Specification-to-Property Extraction with Controlled TRaceable Agents

Functional verification ensures integrated circuits conform to design specs, proving they behave as intended. It's the most time-consuming phase of chip design, taking ≥50% of a project development timeline. With SPECTRA we can save 20% effort, reduce time-to-market and boost Kandou product quality.
Idiap Research Institute, Kandou Bus SA
Innosuisse
Jan 05, 2026
Jan 04, 2028